What the board asks
We went through the ISC board papers, question by question, and matched each question to a topic. Here is what was asked, how often, and what was never asked.
Computer Science: 180 topics in the 2027 syllabus, across 10 units. The board has asked 117 of them at least once. 63 were never asked in the papers we checked.
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CS2 Computer Hardware
All the topics in Computer Science: Computer Hardware
Asked topics first, the most asked at the top. Tap a topic to see what to write, the result, the years, and the real board questions.
24 topics shown
| # | Topic | Type | Marks | Times asked | Last asked | Status |
|---|---|---|---|---|---|---|
| 1 | Define encoder, decoder, multiplexer and state usesWrite a one- or two-line definition of an encoder, a decoder or a multiplexer (inputs, outputs, select lines) and one practical application of each. | Statement | 1 | 6 papers | 2026 | Asked |
| 2 | Derive and reduce the expression of a given logic circuitLabel the output of every gate, write each intermediate expression and the final expression, reduce it with Boolean laws naming each law, and where asked name the single gate it equals or draw its truth table. | Sum | 3 | 5 papers | 2026 | Asked |
| 3 | Encoder vs decoder; decoder vs multiplexerState the difference between the two named devices in terms of number of inputs and outputs, what selects the output, and what each is used for. | Comparison | 2 | 5 papers | 2024 | Asked |
| 4 | Symbol, truth table and expression of the seven gatesFor any of NOT, AND, OR, NAND, NOR, XOR, XNOR (or a gate named from its truth table), draw the standard symbol, write the two-input truth table and the Boolean expression. | Statement | 1 | 3 papers | 2025 | Asked |
| 5 | Output of gates or a gate chain for given inputsWrite the output of each gate in turn for the given input values (or the expression after each gate in a chain) and name the single gate the chain is equal to. | Dry run / output | 1 | 3 papers | 2025 | Asked |
| 6 | Half adder: use, truth table, SUM and CARRY, circuitDefine the half adder and state its use, write the truth table for inputs A, B with outputs SUM and CARRY, derive the canonical SOP for both, and draw the XOR-AND circuit. | Sum | 3 | 3 papers | 2025 improvement | Asked |
| 7 | Octal to binary (8:3) encoder circuit and workingWrite the truth table for inputs D0-D7 and outputs A2 A1 A0, write each output as an OR of inputs, draw the three OR gates, and explain what happens when one digit is pressed. | Diagram | 3 | 3 papers | 2025 improvement | Asked |
| 8 | Reduced SOP as NAND-only, POS as NOR-only circuitConvert the reduced SOP expression to a two-level NAND-NAND circuit (or the POS expression to NOR-NOR) and draw it with inputs and outputs labelled. | Diagram | 1 | 3 papers | 2025 | Asked |
| 9 | Draw the AND-OR or OR-AND circuit of a reduced expressionDraw the gate diagram for a reduced SOP (AND gates feeding one OR) or POS (OR gates feeding one AND) expression, with every input and the output labelled. | Diagram | 1 | 3 papers | 2024 | Asked |
| 10 | Draw the full adder circuit (SUM and CARRY)Draw the logic circuit for SUM (two XOR gates or the SOP form) and for CARRY (three AND gates into one OR), with inputs and outputs labelled. | Diagram | 3 | 3 papers | 2023 | Asked |
| 11 | NOT, OR, AND from NOR gates onlyDraw the NOR-only circuit for the given gate and write the expression at the output of every NOR gate, ending with the required function. | Diagram | 2 | 2 papers | 2026 | Asked |
| 12 | Derive a multiplexer from a decoderExplain that each decoder output is ANDed with one data input and all the AND outputs go to one OR gate, the decoder inputs acting as select lines, and name the multiplexer a given decoder gives (3:8 decoder gives 8:1 MUX). | Give reason | 1 | 2 papers | 2025 improvement | Asked |
| 13 | 3 to 8 (octal) decoder: table, circuit, workingWrite the truth table for inputs A, B, C and outputs D0-D7, write each output as a minterm, draw three NOT gates and eight 3-input AND gates, and explain that exactly one output goes high. | Diagram | 3 | 2 papers | 2024 | Asked |
| 14 | NOT, AND, OR (and A'+B) from NAND gates onlyDraw the NAND-only circuit for the given gate or small expression and write the expression at the output of every NAND gate, ending with the required function. | Diagram | 2 | 2 papers | 2024 | Asked |
| 15 | Full adder truth table and SOP for SUM and CARRYWrite the eight-row truth table for A, B, Cin with SUM and CARRY, derive the canonical SOP for each, and simplify CARRY to AB + BC + CA (and SUM to the XOR form). | Sum | 3 | 2 papers | 2023 | Asked |
| 16 | Half adder versus full adderGive two or three clear points of difference (number of inputs, carry-in, gates needed, use in multi-bit addition). | Comparison | 2 | 2 papers | 2023 | Asked |
| 17 | Full adder built from two half addersDraw two half adder blocks (or their gates) and an OR gate joined so that SUM = A XOR B XOR C and CARRY = AB + C(A XOR B), labelling every intermediate output. | Diagram | 3 | 1 paper | 2026 | Asked |
| 18 | Decoder circuit for a given set of binary codesFor each binary code in the given set, write its minterm and the digit it stands for, and draw one 4-input AND gate (with the needed NOT inputs) per code, each output labelled with its digit. | Diagram | 3 | 1 paper | 2026 | Asked |
| 19 | 4:1 multiplexer circuit and workingWrite the select table, the output expression, draw two NOT gates, four 3-input AND gates and one OR gate, and explain how the select lines pass one data input to the output. | Diagram | 3 | 1 paper | 2023 | Asked |
| 20 | XOR or XNOR from NAND or NOR gates onlyDraw the XOR (or XNOR) circuit using only NAND or only NOR gates, writing the expression at each gate output and showing it reduces to A'B + AB' (or AB + A'B'). | Diagram | 3 | 1 paper | 2020 | Asked |
| 21 | Decimal or hexadecimal to binary encoder circuitWrite the table of digits against their 4-bit codes, write each output bit as an OR of the digit lines that make it 1, and draw the four OR gates. | Diagram | 3 | 1 paper | 2018 | Asked |
| 22 | 8:1 multiplexer circuitWrite the output expression with three select lines, draw three NOT gates, eight 4-input AND gates (each with one data input) and one 8-input OR gate, labelled. | Diagram | 4 | 1 paper | 2017 | Asked |
| 23 | Switching circuit for a Boolean expression and backDraw the series-parallel switch circuit for a given expression (or write the expression for a given switch circuit), and state the gate each arrangement corresponds to. | Diagram | 2 | never | Never asked | |
| 24 | Why NAND and NOR are universal gatesState what a universal gate is and show, in one line each, how NOT, AND and OR are obtained from NAND alone and from NOR alone. | Give reason | 1 | never | Never asked |
This list was made from the 2027 syllabus and checked with 9 board papers, including the 2027 specimen paper. It is not yet checked with the textbook.
The 10 topics Computer Science papers ask most
Counted on the board papers from 2018 to the 2027 specimen paper, which every unit has been checked against.
- 1.Principle of duality: state it and write the dualCS1 Boolean Algebra · asked 8 times since 2018
- 2.Complement of an expression using De Morgan's theoremCS1 Boolean Algebra · asked 8 times since 2018
- 3.Word problem to truth table and SOP or POSCS1 Boolean Algebra · asked 8 times since 2018
- 4.K-map reduction of a four-variable POS expressionCS1 Boolean Algebra · asked 8 times since 2018
- 5.Pre-order, in-order and post-order traversalCS9 Data Structures · asked 8 times since 2018
- 6.K-map reduction of a four-variable SOP expressionCS1 Boolean Algebra · asked 7 times since 2018
- 7.Read a tree: leaves, internal nodes, parent, siblings, degreeCS9 Data Structures · asked 7 times since 2018
- 8.Truth table to classify tautology, contradiction or contingencyCS1 Boolean Algebra · asked 6 times since 2018
- 9.Convert between cardinal and canonical formsCS1 Boolean Algebra · asked 6 times since 2018
- 10.Address of an element, row major and column majorCS6 Arrays and Strings · asked 6 times since 2018